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资料编号:1044660
 
资料名称:SN74LVTH16374DLG4
 
文件大小: 475K
   
说明
 
介绍:
3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
 
 


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本平台电子爱好着纯手工中文简译:截至2020/5/17日,支持英文词汇500个
www.德州仪器.com
特性
SN54LVTH16374 . . . wd pACKAGE
SN74LVTH16374 . . . dgg 或者 dl pACKAGE
(t运算 视图)
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1OE
1Q1
1Q2
1Q3
1Q4
V
CC
1Q5
1Q6
1Q7
1Q8
2Q1
2Q2
2Q3
2Q4
V
CC
2Q5
2Q6
2Q7
2Q8
2OE
1CLK
1D1
1D2
1D3
1D4
V
CC
1D5
1D6
1D7
1D8
2D1
2D2
2D3
2D4
V
CC
2D5
2D6
2D7
2D8
2CLK
描述/orderinginformation
sn54lvth16374,sn74lvth16374
3.3-vabt16-bitedge-triggeredd-typeflip-flops
with3-stateoutputs
SCBS145P–MAY1992–REVISEDOCTOBER2005
MembersoftheTexasInstrumentsWidebus™
家族
状态-的-这-artadvancedbicmos
技术(abt)designfor3.3-voperation
andlowstatic-powerdissipation
supportmixed-modesignaloperation(5-v
inputandoutputvoltageswith3.3-vv
CC
)
SupportUnregulatedBatteryOperationDown
to2.7v
TypicalV
OLP
(outputgroundbounce)<0.8v
atV
CC
=3.3v,t
一个
=25
°
C
I
andpower-up3-statesupporthot
嵌入
BusHoldonDataInputsEliminatestheNeed
forexternalpullup/pulldownresistors
DistributedV
CC
andGNDPinsMinimize
高-speedswitchingnoise
流动-througharchitectureoptimizespcb
布局
获得-upperformanceexceeds500maper
JESD17
ESDProtectionExceedsJESD22
–2000-vhuman-bodymodel(a114-一个)
–200-vmachinemodel(a115-一个)
这'lvth16374devicesare16-bitedge-triggeredd-typeflip-flopswith3-stateoutputsdesignedforlow-电压
(3.3-v)v
CC
运作,butwiththecapabilitytoprovideattlinterfacetoa5-vsystemenvironment.这些
devicesareparticularlysuitableforimplementingbufferregisters,i/oports,bidirectionalbusdrivers,andworking
寄存器.
thesedevicescanbeusedastwo8-bitflip-flopsorone16-bitflip-flop.onthepositivetransitionoftheclock
(clk),theqoutputsoftheflip-floptakeonthelogiclevelssetupatthedata(d)输入.
abufferedoutput-使能(oe)inputcanbeusedtoplacetheeightoutputsineitheranormallogicstate(highor
lowlogiclevels)orahigh-impedancestate.inthehigh-impedancestate,theoutputsneitherloadnordrivethe
buslinessignificantly.thehigh-impedancestateandtheincreaseddriveprovidethecapabilitytodrivebuslines
withoutneedforinterfaceorpullupcomponents.
oedoesnotaffectinternaloperationsoftheflip-flop.olddatacanberetainedornewdatacanbeenteredwhile
theoutputsareinthehigh-impedancestate.
activebus-holdcircuitryholdsunusedorundriveninputsatavalidlogicstate.useofpulluporpulldownresistors
withthebus-holdcircuitryisnotrecommended.
pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsoftexas
instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
widebusisatrademarkoftexasinstruments.
productiondatainformationiscurrentasofpublicationdate.
copyright©1992–2005,texasinstrumentsincorporated
ProductsconformtospecificationsperthetermsoftheTexas
onproductscomplianttomil-prf-38535,allparametersare
instrumentsstandardwarranty.productionprocessingdoesnot
testedunlessotherwisenoted.onallotherproducts,生产
necessarilyincludetestingofallparameters.
processingdoesnotnecessarilyincludetestingofallparameters.
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