www.ti.com
特点
TMS470R1A288
16/32-bitriscflashmicrocontroller
SPNS106–SEPTEMBER2005
•
16-mailboxcapacity
•
高-performancestaticcmostechnology
•
fullycompliantwithcanprotocol,
version2.0b
•
tms470r1x16/32-bitrisccore
(arm7tdmi™)–threeinter-integratedcircuit(i2c)模块
–24-mhzsystemclock(48-mhzpipeline)
•
多-masterandslaveinterfaces
–independent16/32-bitinstructionset
•
upto400kbps(fastmode)
–openarchitecturewiththird-partysupport
•
7-and10-bitaddresscapability
–built-indebugmodule
•
高-endtimerlite(het)
•
integratedmemory–12programmablei/ochannels:
–288k-byteprogramflash
•
12high-resolutionpins
•
twobankswith8contiguoussectors–high-resolutionsharefeature(异或)
–16k-bytestaticram(sram)–high-endtimerram
–memorysecuritymodule(msm)
•
64-instructioncapacity
–JTAGSecurityModule
•
externalclockprescale(ecp)模块
•
operatingfeatures–programmablelow-frequencyexternal
时钟(clk)
–low-powermodes:standbyandhalt
•
12-channel10-bitmulti-bufferedadc
–IndustrialTemperatureRange
(mibadc)
•
470+SystemModule
–64-wordfifobuffer
–32-bitaddressspacedecoding
–single-orcontinuous-conversionmodes
–bussupervisionformemory/外围设备
–1.55µsminimumsample/conversiontime
–digitalwatchdog(dwd)计时器
–calibrationmodeandself-testfeatures
–analogwatchdog(awd)计时器
•
FlexibleInterruptHandling
–enhancedreal-timeinterrupt(rti)
•
expansionbusmodule(ebm)(pgeonly)
–interruptexpansionmodule(iem)
–supports8-and16-bitexpansionbus
–SystemIntegrityandFailureDetection
MemoryInterfaceMappings
–ICEBreaker
–42i/oexpansionbuspins
•
directmemoryaccess(dma)控制器
•
50dedicatedgeneral-purposei/o(gio)针脚
–32ControlPacketsand16Channels
and43additionalperipherali/操作系统(pge)
•
零-pinphase-lockedloop(zpll)-基于
•
14dedicatedgeneral-purposei/o(gio)针脚
ClockModuleWithPrescaler
and43additionalperipherali/操作系统(pz)
–multiply-由-8internalzplloption
•
16ExternalInterrupts
–ZPLLBypassMode
•
开启-chipscan-baseemulationlogic,ieee
•
tencommunicationinterfaces:
standard1149.1
(1)
(jtag)测试一下-accessport
–twoserialperipheralinterfaces(spis)
•
144-pinplasticlow-profilequadflatpack
•
255programmablebaudrates(pgesuffix)
–twoserialcommunicationinterfaces(scis)
•
100-pinplasticlow-profilequadflatpack(pz
后缀)
•
2
24
SelectableBaudRates
(1)
thetest-accessportiscompatiblewiththeieeestandard
•
异步/isosynchronousmodes
1149.1-1990,ieeestandardtest-accessportandboundary
–classiiserialinterfaceb(c2sib)
scanarchitecturespecification.boundaryscanisnot
supportedonthisdevice.
•
normal10.4kbpsand4xmode41.6kbps
–twostandardcancontrollers(scc)
pleasebeawarethatanimportantnoticeconcerningavailability,标准保修,anduseincriticalapplicationsoftexas
instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
arm7tdmiisatrademarkofadvancedriscmachineslimited(手臂).
alltrademarksarethepropertyoftheirrespectiveowners.
productiondatainformationiscurrentasofpublicationdate.
copyright©2005,texasinstrumentsincorporated
ProductsconformtospecificationsperthetermsoftheTexas
instrumentsstandardwarranty.productionprocessingdoesnot
必要包括测试所有参数.
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