MC68LC060_集成电路资料查询网

表格 的 内容
xii
m68060 用户’s 手工的
MOTOROLA
6.2 效应 的 mdis 在 地址 转变 .................................................... 4-30
7 mmu 说明........................................................................................ 4-30
7.1 MOVEC .................................................................................................... 4-30
7.2 PFLUSH ................................................................................................... 4-30
7.3 PLPA ........................................................................................................ 4-30
部分 5
Caches
1 cache 运作........................................................................................... 5-1
2 cache 控制 寄存器 ................................................................................ 5-5
3 cache 管理 ..................................................................................... 5-6
4 caching 模式............................................................................................. 5-7
4.1 cachable accesses .................................................................................... 5-7
4.1.1 writethrough 模式................................................................................... 5-7
4.1.2 copyback 模式 ....................................................................................... 5-8
4.2 cache-inhibited accesses .......................................................................... 5-8
4.3 特定的 accesses ....................................................................................... 5-9
5 cache 协议 ............................................................................................. 5-9
5.1 读 miss................................................................................................... 5-9
5.2 写 miss................................................................................................... 5-9
5.3 读 hit...................................................................................................... 5-9
5.4 写 hit.................................................................................................... 5-10
6 cache coherency ....................................................................................... 5-10
7 记忆 accesses 为 cache maintenance ................................................ 5-11
7.1 cache filling............................................................................................. 5-11
7.2 cache pushes .......................................................................................... 5-13
8 推 缓存区 ................................................................................................. 5-13
9 store 缓存区................................................................................................. 5-13
10 推 缓存区 和 store 缓存区 总线 运作.............................................. 5-14
11 branch cache ............................................................................................. 5-14
12 cache 运作 summary ........................................................................ 5-15
12.1 操作指南 cache...................................................................................... 5-15
12.2 数据 cache............................................................................................... 5-16
部分 6
floating-要点 单位
1 floating-要点 用户 程序编制 模型...................................................... 6-2
1.1 floating-要点 数据 寄存器 (fp7–fp0) .................................................. 6-3
1.2 floating-要点 控制 寄存器 (fpcr) ..................................................... 6-3
1.2.1 例外 使能 字节 ............................................................................. 6-3
1.2.2 模式 控制 字节.................................................................................... 6-3
1.3 floating-要点 状态 寄存器 (fpsr)....................................................... 6-4
1.3.1 floating-要点 情况 代号 字节 ......................................................... 6-5
1.3.2 quotient 字节............................................................................................ 6-5
1.3.3 例外 状态 字节 .............................................................................. 6-5

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表格的内容 xii m68060 用户’s 手工的 MOTOROLA 4.6.2 效应的 mdis 在地址转变 .................................................... 4-30 4.7 mmu 说明........................................................................................ 4-30 4.7.1 MOVEC .................................................................................................... 4-30 4.7.2 PFLUSH ................................................................................................... 4-30 4.7.3 PLPA ........................................................................................................ 4-30 部分 5 Caches 5.1 cache 运作........................................................................................... 5-1 5.2 cache 控制寄存器 ................................................................................ 5-5 5.3 cache 管理 ..................................................................................... 5-6 5.4 caching 模式............................................................................................. 5-7 5.4.1 cachable accesses .................................................................................... 5-7 5.4.1.1 writethrough 模式................................................................................... 5-7 5.4.1.2 copyback 模式 ....................................................................................... 5-8 5.4.2 cache-inhibited accesses .......................................................................... 5-8 5.4.3 特定的 accesses ....................................................................................... 5-9 5.5 cache 协议 ............................................................................................. 5-9 5.5.1 读 miss................................................................................................... 5-9 5.5.2 写 miss................................................................................................... 5-9 5.5.3 读 hit...................................................................................................... 5-9 5.5.4 写 hit.................................................................................................... 5-10 5.6 cache coherency ....................................................................................... 5-10 5.7 记忆 accesses 为 cache maintenance ................................................ 5-11 5.7.1 cache filling............................................................................................. 5-11 5.7.2 cache pushes .......................................................................................... 5-13 5.8 推缓存区 ................................................................................................. 5-13 5.9 store 缓存区................................................................................................. 5-13 5.10 推缓存区和 store 缓存区总线运作.............................................. 5-14 5.11 branch cache ............................................................................................. 5-14 5.12 cache 运作 summary ........................................................................ 5-15 5.12.1 操作指南 cache...................................................................................... 5-15 5.12.2 数据 cache............................................................................................... 5-16 部分 6 floating-要点单位 6.1 floating-要点用户程序编制模型...................................................... 6-2 6.1.1 floating-要点数据寄存器 (fp7–fp0) .................................................. 6-3 6.1.2 floating-要点控制寄存器 (fpcr) ..................................................... 6-3 6.1.2.1 例外使能字节 ............................................................................. 6-3 6.1.2.2 模式控制字节.................................................................................... 6-3 6.1.3 floating-要点状态寄存器 (fpsr)....................................................... 6-4 6.1.3.1 floating-要点情况代号字节 ......................................................... 6-5 6.1.3.2 quotient 字节............................................................................................ 6-5 6.1.3.3 例外状态字节 .............................................................................. 6-5

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