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2.3signaldescriptions
TMS320VC5409A
fixed-pointdigitalsignalprocessor
SPRS140F–NOVEMBER2000–REVISEDJANUARY2005
table2-2listseachsignal,函数,andoperatingmode(s)groupedbyfunction.seesectionsection2.2
forexactpinlocationsbasedonpackagetype.
table2-2.signaldescriptions
终端
i/o
(1)
描述
名字
DATASIGNALS
a22(msb)
A21
A20
A19
A18
A17
A16
a15paralleladdressbusa22[mostsignificantbit(msb)]througha0[leastsignificantbit(lsb)].thesixteen
a14lsblines,a0toa15,aremultiplexedtoaddressexternalmemory(程序,数据)ori/o.thesevenmsb
a13lines,a16toa22,addressexternalprogramspacememory.a22-a0isplacedinthehigh-impedancestate
a12intheholdmode.a22-a0alsogoesintothehigh-impedancestatewhenoffislow.
a11i/o/z
(2)(3)
a15-a0areinputsinhpi16mode.thesepinscanbeusedtoaddressinternalmemoryviathehost-端口
a10interface(hpi)whenthehpi16pinishigh.thesepinsalsohaveschmitttriggerinputs.
A9Theaddressbushasabusholderfeaturethateliminatespassivecomponentsandthepowerdissipation
a8associatedwiththem.thebusholderkeepstheaddressbusatthepreviouslogiclevelwhenthebusgoes
a7intoahigh-impedancestate.
A6
A5
A4
A3
A2
A1
a0(lsb)
d15(msb)
D14
D13
D12
d11paralleldatabusd15(msb)throughd0(lsb).d15-d0ismultiplexedtotransferdatabetweenthecore
d10cpuandexternaldata/programmemoryori/odevicesorhpiinhpi16mode(whenhpi16pinishigh).
d9d15-d0isplacedinthehigh-impedancestatewhennotoutputtingdataorwhenrsorholdisasserted.
d8d15-d0alsogoesintothehigh-impedancestatewhenoffislow.thesepinsalsohaveschmitttrigger
i/o/z
(2)(3)
d7inputs.thedatabushasabusholderfeaturethateliminatespassivecomponentsandthepower
d6dissipationassociatedwiththem.thebusholderkeepsthedatabusatthepreviouslogiclevelwhenthe
d5busgoesintothehigh-impedancestate.thebusholdersonthedatabuscanbeenabled/disabledunder
d4softwarecontrol.
D3
D2
D1
d0(lsb)
initialization,interruptandresetoperations
interruptacknowledgesignal.iackindicatesreceiptofaninterruptandthattheprogramcounteris
iacko/zfetchingtheinterruptvectorlocationdesignatedbya15-a0.iackalsogoesintothehigh-impedancestate
whenoffislow.
INT0
(2)
externaluserinterruptinputs.int0-int3aremaskableandareprioritizedbytheinterruptmaskregister
INT1
(2)
i(imr)andtheinterruptmodebit.int0-int3canbepolledandresetbywayoftheinterruptflagregister
INT2
(2)
(ifr).
INT3
(2)
nonmaskableinterrupt.nmiisanexternalinterruptthatcannotbemaskedbywayoftheintmortheimr.
NMI
(2)
I
whennmiisactivated,theprocessortrapstotheappropriatevectorlocation.
重置.rscausesthedigitalsignalprocessor(dsp)toterminateexecutionandforcestheprogram
RS
(2)
icounterto0ff80h.whenrsisbroughttoahighlevel,executionbeginsatlocation0ff80hofprogram
记忆.rsaffectsvariousregistersandstatusbits.
(1)i=输入,o=输出,z=高-阻抗,s=供应
(2)thesepinshaveschmitttriggerinputs.
(3)thispinhasaninternalbusholdercontrolledbywayofthebscrregister.
介绍
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