www.德州仪器.com
TMS320VC5409A
fixed-pointdigitalsignalprocessor
SPRS140F–NOVEMBER2000–REVISEDJANUARY2005
table2-2.signaldescriptions(持续)
终端
i/o
(1)
描述
名字
微处理器/microcomputermodeselect.ifactivelowatreset,microcomputermodeisselected,和
theinternalprogramromismappedintotheupper16kwordsofprogrammemoryspace.ifthepinis
mp/mcidrivenhighduringreset,microprocessormodeisselected,andtheon-chipromisremovedfromprogram
空间.thispinisonlysampledatreset,andthemp/mcbitoftheprocessormodestatus(pmst)寄存器
canoverridethemodethatisselectedatreset.
MULTIPROCESSINGSIGNALS
branchcontrol.abranchcanbeconditionallyexecutedwhenbioisactive.iflow,theprocessorexecutes
BIO
(2)
itheconditionalinstruction.thebioconditionissampledduringthedecodephaseofthepipelineforthe
xcinstruction,andallotherinstructionssamplebioduringthereadphaseofthepipeline.
externalflagoutput(latchedsoftware-programmablesignal).xfissethighbythessbxxfinstruction,设置
lowbyrsbxxfinstructionorbyloadingst1.xfisusedforsignalingotherprocessorsinmultiprocessor
xfo/z
configurationsorusedasageneral-purposeoutputpin.xfgoesintothehigh-impedancestatewhenoff
islow,andissethighatreset.
MEMORYCONTROLSIGNALS
数据,程序,andi/ospaceselectsignals.ds,ps,andisarealwayshighunlessdrivenlowfor
DS
communicatingtoaparticularexternalspace.activeperiodcorrespondstovalidaddressinformation.ds,
pso/z
ps,andisareplacedintothehigh-impedancestateintheholdmode;thesesignalsalsogointothe
是
高-impedancestatewhenoffislow.
memorystrobesignal.mstrbisalwayshighunlesslow-levelassertedtoindicateanexternalbusaccess
mstrbo/ztodataorprogrammemory.mstrbisplacedinthehigh-impedancestateintheholdmode;italsogoes
intothehigh-impedancestatewhenoffislow.
dataready.readyindicatesthatanexternaldeviceispreparedforabustransactiontobecompleted.如果
thedeviceisnotready(readyislow),theprocessorwaitsonecycleandchecksreadyagain.notethat
READYI
theprocessorperformsreadydetectionifatleasttwosoftwarewaitstatesareprogrammed.theready
signalisnotsampleduntilthecompletionofthesoftwarewaitstates.
读/writesignal.r/windicatestransferdirectionduringcommunicationtoanexternaldevice.r/wis
normallyinthereadmode(高),unlessitisassertedlowwhenthedspperformsawriteoperation.r/w
r/wo/z
isplacedinthehigh-impedancestateintheholdmode;anditalsogoesintothehigh-impedancestate
whenoffislow.
i/ostrobesignal.iostrbisalwayshighunlesslow-levelassertedtoindicateanexternalbusaccesstoan
iostrbo/zi/odevice.iostrbisplacedinthehigh-impedancestateintheholdmode;italsogoesintothe
高-impedancestatewhenoffislow.
holdinput.holdisassertedtorequestcontroloftheaddress,数据,andcontrollines.当
HOLDI
acknowledgedbythe5409a,theselinesgointothehigh-impedancestate.
holdacknowledge.holdaindicatestotheexternalcircuitrythattheprocessorisinaholdstateandthat
holdao/ztheaddress,数据,andcontrollinesareinthehigh-impedancestate,allowingthemtobeavailabletothe
externalcircuitry.holdaalsogoesintothehigh-impedancestatewhenoffislow.
microstatecomplete.mscindicatescompletionofallsoftwarewaitstates.whentwoormoresoftwarewait
statesareenabled,themscpingoesactiveatthebeginningofthefirstsoftwarewaitstateandgoes
msco/zinactivehighatthebeginningofthelastsoftwarewaitstate.ifconnectedtothereadyinput,mscforces
oneexternalwaitstateafterthelastinternalwaitstateiscompleted.mscalsogoesintothe
高-impedancestatewhenoffislow.
instructionacquisitionsignal.iaqisasserted(activelow)whenthereisaninstructionaddressonthe
iaqo/z
addressbusandgoesintothehigh-impedancestatewhenoffislow.
振荡器/timersignals
clockoutputsignal.clkoutcanrepresentthemachine-cyclerateofthecpudividedby1,2,3,or4as
clkouto/zconfiguredinthebank-switchingcontrolregister(bscr).followingreset,clkoutrepresentsthe
机器-cycleratedividedby4.
clockmodeselectsignals.clkmd1-clkmd3allowtheselectionandconfigurationofdifferentclock
CLKMD1
(2)
modessuchascrystal,externalclock,andpllmode.theexternalclkmd1-clkmd3pinsaresampled
CLKMD2
(2)
I
todeterminethedesiredclockgenerationmodewhilersislow.followingreset,theclockgeneration
CLKMD3
(2)
modecanbereconfiguredbywritingtotheinternalclockmoderegisterinsoftware.
时钟/oscillatorinput.iftheinternaloscillatorisnotbeingused,x2/clkinfunctionsastheclockinput.
x2/clkin
(2)
I
(thisisrevisiondepended,seesectionsection3.10foradditionalinformation.)
outputpinfromtheinternaloscillatorforthecrystal.iftheinternaloscillatorisnotused,x1shouldbeleft
x1ounconnected.x1doesnotgointothehigh-impedancestatewhenoffislow.(thisisrevisiondepended,
seesectionsection3.10foradditionalinformation.)
timeroutput.toutsignalsapulsewhentheon-chiptimercountsdownpastzero.thepulseisone
touto/z
clkoutcyclewide.toutalsogoesintothehigh-impedancestatewhenoffislow.
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