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描述/orderinginformation(持续)
gql pACKAGE
(t运算 视图)
一个
B
C
D
E
F
G
H
J
K
1 2 3 4 5 6
1OE
1CLK
1D1
To 七 其它 途径
1Q1
2OE
2CLK
2D1
2Q1
To 七 其它 途径
1
48
47
24
25
36
C1
1D
132
C1
1D
管脚 号码 显示 是 为 这 dgg 和 dgv 包装.
SN74AUC16374
16-bitedge-triggeredd-typeflip-flop
with3-stateoutputs
SCES403D–JULY2002–REVISEDJUNE2005
toensurethehigh-impedancestateduringpoweruporpowerdown,oeshouldbetiedtov
CC
throughapullup
电阻;theminimumvalueoftheresistorisdeterminedbythecurrent-sinkingcapabilityofthedriver.
thisdeviceisfullyspecifiedforpartial-电源-downapplicationsusingi
止
.thei
止
circuitrydisablestheoutputs,
preventingdamagingcurrentbackflowthroughthedevicewhenitispowereddown.
TERMINALASSIGNMENTS
(1)
123456
一个
1OENCNCNCNC1CLK
B
1Q21Q1GNDGND1D11D2
C
1Q41Q3V
CC
V
CC
1D31D4
D
1Q61Q5GNDGND1D51D6
E
1Q81Q71D71D8
F
2Q12Q22D22D1
G
2Q32Q4GNDGND2D42D3
H
2Q52Q6V
CC
V
CC
2D62D5
J
2Q72Q8GNDGND2D82D7
K
2OENCNCNCNC2CLK
(1)nc-nointernalconnection
FUNCTIONTABLE
(eachflip-flop)
输入
输出
Q
OECLKD
L
↑
HH
L
↑
LL
LHorLXQ
0
HXXZ
logicdiagram(positivelogic)
2
: 点此下载
