rev. 0–6–
AD9777
管脚 配置
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管脚 1
IDENTIFIER
顶 视图
(不 至 规模)
60
59
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51
50
49
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AVDD
AGND
AVDD
AGND
AVDD
AGND
AGND
I
OUTA1
I
OUTB1
AGND
AGND
I
OUTA2
I
OUTB2
AGND
AGND
AVDD
AGND
AVDD
AGND
AVDD
CLKVDD
LPF
CLKVDD
CLKGND
CLK+
CLK–
dataclk/pll_锁
DGND
DVDD
p1b15 (msb)
P1B14
P1B13
P1B12
P1B11
P1B10
DGND
DVDD
P1B9
P1B8
FSADJ1
FSADJ2
REFIO
重置
spi_csb
spi_clk
spi_sdio
spi_sdo
DGND
DVDD
p2b0 (lsb)
P2B1
P2B3
P2B4
P2B5
P1B7
P1B6
P1B5
P1B4
DGND
DVDD
P1B3
P1B2
P1B1
p1b0 (lsb)
oneportclk/p2b14
P2B13
P2B12
DGND
DVDD
iqsel/p2b15 (msb)
AD9777
TxDAC+
DGND
DVDD
P2B6
P2B7
P2B11
P2B10
P2B9
P2B8
CLKGND
P2B2