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资料编号:253867
 
资料名称:DAC7811
 
文件大小: 698.34K
   
说明
 
介绍:
12-Bit, Serial Input, Multiplying Digital-to-Analog Converter
 
 


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产品 预告(展)
SYNCInterrupt
daisy-chain
t
CSS
t
CH
t
DS
t
DH
t
DDS
t
CC
t
CST
t
9
t
C
SCLK
同步
SDIN
DB15
(n)
DB0
(n)
DB15
(n)
DB0
(n)
DB15
(n + 1)
DB0
(n + 1)
SDO
ControlBitsC3toC0
DAC7811
SBAS337–APRIL2005
inanormalwritesequence,thesynclineiskeptlowforatleast16fallingedgesofsclkandthedacis
updatedonthe16thfallingedge.不管怎样,ifsyncisbroughthighbeforethe16thfallingedge,thisactsasan
interrupttothewritesequence.theshiftregisterisresetandthewritesequenceisseenasinvalid.neitheran
updateofthedacregistercontentsorachangeintheoperatingmodeoccurs.
TheDAC7811powersupinthedaisychainmodewhichmustbeusedwhen2ormoredevicesareconnectedin
tandem.thesclkandsyncsignalsaresharedacrossalldeviceswhilethesdooutputofthefirstdevice
connectstothesdininputofthefollowingdevice,andsoforth.inthisconfiguration16sclkcyclesforeach
dac7811inthechainarerequired.pleaserefertothetimingdiagramoffigure28.
n
devicesinadaisy-chainconfiguration,16
n
SCLKcyclesarerequiredtoshiftintheentireinputdata
stream.after16
n
activesclkedgesarereceivedfollowingafallingsync,thedatastreambecomescomplete,
andsynccanbroughthightoupdatendevicessimultaneously.
whensyncisbroughthigh,eachdevicewillexecutethefunctiondefinedbythefourdaccontrolbitsc3-c0in
itsinputshiftregister.forexample,c3-c0mustbe
0001
foreachDACinthechainthatistobeupdatedwith
newdata,andc3-c0mustbe
0000
foreachdacinthechainwhosecontentsaretoremainunchanged.
AcontinuousstreamcontainingtheexactnumberofSCLKcyclesmaybesentfirstwhiletheSYNCsignalisheld
低,andthenraisesyncatalatertime.nothinghappensuntiltherisingedgeofsync,andtheneach
dac7811inthechainwillexecutethefunctiondefinedbythefourdaccontrolbitsc3-c0initsinputshift
寄存器.
figure28.dac7811timingdiagram
controlbitsc3toc0allowcontrolofvariousfunctionsofthedac;seetable3.defaultsettingsofthedacon
poweringupareasfollows:dataclockedintoshiftregisteronfallingclockedges;daisy-chainmodeisenabled.
devicepowersonwithzero-scaleloadedintothedacregisterandioutlines.thedaccontrolbitsallowthe
usertoadjustcertainfeaturesaspartofaninitializationsequence,forexample,daisy-chainingmaybedisabled
ifnotinuse,activeclockedgemaybechangedtorisingedge,anddacoutputmaybeclearedtoeitherzeroor
midscale.theusermayalsoinitiateareadbackofthedacregistercontentsforverificationpurposes.
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