PERICOMPI7C8150_集成电路资料查询网

PI7C8150
2-端口 pci-至-pci 桥
进步 信息
v
8月 22, 2002 – 修订 1.02
3 记忆 地址 解码 ........................................................................................... 31
3.1 记忆-编排 i/o 根基 和 限制 地址 寄存器
......................... 32
3.2 prefetchable 记忆 根基 和 限制 地址 寄存器
................. 33
4 vga 支持........................................................................................................................... 34
4.1 vga 模式
......................................................................................................................... 34
4.2 vga snoop 模式
........................................................................................................... 34
TRANSACTION订货.......................................................................................................... 35
1 transactions governed 用 订货 rules ....................................................... 35
2 一般 订货 指导原则 ..................................................................................... 36
3 订货 rules.................................................................................................................... 36
4 数据 同步 .................................................................................................... 37
错误 处理......................................................................................................................... 38
1 地址 parity errors .................................................................................................... 38
2 数据 parity errors ...........................................................................................................39
2.1 配置 写 transactions 至 配置 空间
.......... 39
2.2 读 transactions
.................................................................................................... 39
2.3 delayed 写 transactions
............................................................................... 40
2.4 posted 写 transactions
.................................................................................. 43
3 数据 parity 错误 reporting summary................................................................. 44
4 系统 错误 (serr#) reporting ................................................................................. 48
独有的进入 ...................................................................................................................... 49
1 concurrent locks .............................................................................................................49
2 acquiring 独有的进入 横过PI7C8150 ....................................................... 49
2.1 锁 transactions 在 downstream 方向
..................................... 49
2.2 锁 transaction 在 upstream 方向
.............................................. 51
3 ending 独有的 进入................................................................................................ 51
pci 总线 arbitration................................................................................................................. 51
1 primary pci 总线 arbitration ........................................................................................ 52
2 secondary pci 总线 arbitration.................................................................................. 52
2.1 secondary 总线 arbitration 使用 这 内部的 arbiter
.................... 52
2.2 PREEMPTION
.................................................................................................................... 54
2.3 secondary 总线 arbitration 使用 一个 外部 arbiter
...................... 54
2.4 总线 parking
.................................................................................................................... 54
CLOCKS ............................................................................................................................................. 55
1 primary 时钟 输入....................................................................................................... 55
2 secondary 时钟 输出 ............................................................................................ 55
一般 目的 i/o 接口.................................................................................... 55
1 gpio 控制 寄存器................................................................................................... 55
2 secondary 时钟 控制............................................................................................ 56
3 live 嵌入 ....................................................................................................................... 58
pci 电源 管理 .................................................................................................... 58
重置............................................................................................................................................. 59
1 primary 接口 重置................................................................................................ 59
2 secondary 接口 重置.......................................................................................... 59
3 碎片 重置................................................................................................................................ 60

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PI7C8150 2-端口 pci-至-pci 桥进步信息 v 8月 22, 2002 – 修订 1.02 4.3 记忆地址解码 ........................................................................................... 31 4.3.1 记忆-编排 i/o 根基和限制地址寄存器 ......................... 32 4.3.2 prefetchable 记忆根基和限制地址寄存器 ................. 33 4.4 vga 支持........................................................................................................................... 34 4.4.1 vga 模式 ......................................................................................................................... 34 4.4.2 vga snoop 模式 ........................................................................................................... 34 5 TRANSACTION订货.......................................................................................................... 35 5.1 transactions governed 用订货 rules ....................................................... 35 5.2 一般订货指导原则 ..................................................................................... 36 5.3 订货 rules.................................................................................................................... 36 5.4 数据同步 .................................................................................................... 37 6 错误处理......................................................................................................................... 38 6.1 地址 parity errors .................................................................................................... 38 6.2 数据 parity errors ...........................................................................................................39 6.2.1 配置写 transactions 至配置空间 .......... 39 6.2.2 读 transactions .................................................................................................... 39 6.2.3 delayed 写 transactions ............................................................................... 40 6.2.4 posted 写 transactions .................................................................................. 43 6.3 数据 parity 错误 reporting summary................................................................. 44 6.4 系统错误 (serr#) reporting ................................................................................. 48 7 独有的进入 ...................................................................................................................... 49 7.1 concurrent locks .............................................................................................................49 7.2 acquiring 独有的进入横过PI7C8150 ....................................................... 49 7.2.1 锁 transactions 在 downstream 方向 ..................................... 49 7.2.2 锁 transaction 在 upstream 方向 .............................................. 51 7.3 ending 独有的进入................................................................................................ 51 8 pci 总线 arbitration................................................................................................................. 51 8.1 primary pci 总线 arbitration ........................................................................................ 52 8.2 secondary pci 总线 arbitration.................................................................................. 52 8.2.1 secondary 总线 arbitration 使用这内部的 arbiter .................... 52 8.2.2 PREEMPTION .................................................................................................................... 54 8.2.3 secondary 总线 arbitration 使用一个外部 arbiter ...................... 54 8.2.4 总线 parking .................................................................................................................... 54 9 CLOCKS ............................................................................................................................................. 55 9.1 primary 时钟输入....................................................................................................... 55 9.2 secondary 时钟输出 ............................................................................................ 55 10 一般目的 i/o 接口.................................................................................... 55 10.1 gpio 控制寄存器................................................................................................... 55 10.2 secondary 时钟控制............................................................................................ 56 10.3 live 嵌入 ....................................................................................................................... 58 11 pci 电源管理 .................................................................................................... 58 12 重置............................................................................................................................................. 59 12.1 primary 接口重置................................................................................................ 59 12.2 secondary 接口重置.......................................................................................... 59 12.3 碎片重置................................................................................................................................ 60

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