intel® 450nx pciset
-iii-
内容
3.4.8 gapen: 间隙 使能................................................................................................................ 3-36
3.4.9 hdr: 标头 类型 寄存器 ...................................................................................................... 3-36
3.4.10 hxgb: 高 expansion 间隙 根基............................................................................................. 3-36
3.4.11 hxgt: 高 expansion 间隙 顶............................................................................................... 3-36
3.4.12 ioabase: i/o apic 根基 地址............................................................................................ 3-37
3.4.13 isa: isa 空间 .......................................................................................................................... 3-37
3.4.14 lxgb: 低 expansion 间隙 根基.............................................................................................. 3-37
3.4.15 lxgt: 低 expansion 间隙 顶 ................................................................................................ 3-37
3.4.16 mar[6:0]: 记忆 attribute 区域 寄存器.......................................................................... 3-38
3.4.17 mlt: 主控 latency 计时器 寄存器......................................................................................... 3-38
3.4.18 mmbase: 记忆-编排 pci 根基 ..................................................................................... 3-38
3.4.19 mmt: 记忆-编排 pci 顶 ............................................................................................... 3-39
3.4.20 mtt: multi-transaction 计时器 寄存器 ..................................................................................... 3-39
3.4.21 pcicmd: pci command 寄存器............................................................................................. 3-39
3.4.22 pcists: pci 状态 寄存器 .................................................................................................... 3-40
3.4.23 pmd[1:0]: 效能 monitoring 数据 寄存器..................................................................... 3-41
3.4.24 pme[1:0]: 效能 monitoring 事件 选择.................................................................. 3-42
3.4.25 Pmr[1:0]: 效能 monitoring 回馈 .......................................................................... 3-43
3.4.26 rid: 修订 identification 寄存器 ......................................................................................... 3-44
3.4.27 rc: 重置 控制 寄存器 ....................................................................................................... 3-44
3.4.28 Route: route 地方 seed......................................................................................................... 3-45
3.4.29 smram: smm 内存 控制 寄存器 ....................................................................................... 3-45
3.4.30 tcap: 目标 capacity .............................................................................................................. 3-46
3.4.31 tmode: 计时器 模式................................................................................................................. 3-46
3.4.32 tom: 顶 的 记忆................................................................................................................. 3-47
3.4.33 vid: vendor identification 寄存器............................................................................................ 3-47
chapter 4
系统 地址 maps ....................................................................................................................... 4-1
4.1 记忆 地址 编排 ................................................................................................................................. 4-1
4.1.1 记忆-编排 i/o spaces ........................................................................................................ 4-4
4.1.2 smm 内存 支持 ....................................................................................................................... 4-4
4.2 I/o 空间 .................................................................................................................................................... 4-5
4.3 pci 配置 空间............................................................................................................................. 4-6
chapter 5
接口............................................................................................................................................. 5-1
5.1 系统 总线 ................................................................................................................................................. 5-1
5.2 pci 总线 ....................................................................................................................................................... 5-1
5.3 expander 总线.............................................................................................................................................. 5-1
5.3.1 expander 电的 信号 和 时钟 分发 ........................................................................ 5-2
5.4 第三-群 agents ...................................................................................................................................... 5-2
5.5 连接器 .................................................................................................................................................. 5-3
chapter 6
记忆 subsystem ............................................................................................................................ 6-1
6.1 Overview ..................................................................................................................................................... 6-1
6.1.1 物理的 organization ................................................................................................................... 6-1
6.1.2 配置 rules 和 限制 ............................................................................................. 6-3
6.1.2.1 Interleaving .................................................................................................................. 6-3
6.1.2.2 地址 位 permuting rules 和 限制 ............................................................. 6-4
6.1.2.3 card 至 card (c2c) interleaving rules 和 限制................................................ 6-4
6.1.3 地址 位 permuting .................................................................................................................. 6-5
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