先进的 i/o 控制 和 motherboard glue 逻辑
数据手册
修订 1.8
smsc/非-smsc 寄存器 sets
(02-24-05)
8
smsc lpc47m182
数据手册
图示 7.18 – latched backfeed 截 flowchart .........................................................................................................151
图示 7.19– cnr circuit ..........................................................................................................................................153
图示 13.1 - power-向上 德州仪器ming ..................................................................................................................................200
图示 13.2 - input 时钟定时 ...............................................................................................................................201
图示 13.3 - pci 时钟 德州仪器ming ..................................................................................................................................201
图示 13.4 -重置 德州仪器ming.........................................................................................................................................201
图示 13.5 - 输出 定时 measurement 情况, lpc signals ..........................................................................202
图示 13.6 - 输入 定时 measurement 情况, lpc signals...........................................................................202
图示 13.7 -i/o 写................................................................................................................................................202
图示 13.8- i/o读 ...............................................................................................................................................203
图示 13.9 – dma request assertion通过NLDRQ ...........................................................................................203
图示 13.10 – dma write (第一字节) .......................................................................................................................203
图示 13.11 – dma read (第一 字节) .......................................................................................................................203
图示 13.12 – floppy disk drive 定时 (在模式 在ly) ..........................................................................................204
图示 13.13 – epp 1.9 数据或者 地址 write 循环 ...............................................................................................205
图示 13.14 – epp 1.9 数据或者 地址读 循环...............................................................................................206
图示 13.15 – epp 1.7 数据或者 地址 write 循环 ...............................................................................................207
图示 13.16 – epp 1.7 数据或者 地址读 循环...............................................................................................207
图示 13.17 – 并行的端口 先进先出 定时...................................................................................................................209
图示 13.18 - ecp 并行的端口 向前 定时 ......................................................................................................210
图示 13.19 – ecp 并行的端口 reverse 德州仪器ming .....................................................................................................211
图示 13.20 – 设置向上 和 支撑时间 .........................................................................................................................212
图示 13.21 – serial 端口 数据..................................................................................................................................212
图示 13.22 – 键盘/mousereceive/send data 德州仪器ming ....................................................................................213
图示 13.23 – 风扇 tachometer 输入定时 ............................................................................................................214
图示 13.24 – 电源led 输出定时 .................................................................................................................214
图示 13.25 – ref5v/ref5v_stby 输出 当 vcc/vtr ramps 向上 在之前vcc5v/ v_5p0_stby...............215
图示 13.26 – ref5v/ref5v_stby 输出 当 vcc5v/ v_5p0_stby ramps 向上在之前 vcc/vtr...............215
图示 13.27 – ref5v/ref5v_stby 输出 当 vcc/vtr ramps 向下 在之前vcc5v/ v_5p0_stby ..........216
图示 13.28 – ref5v/ref5v_stby 输出 当 vcc5v/ v_5p0_stby ramps 向下在之前 vcc/vtr ..........216
图示 13.29 – 上升, 下降和 propagati在 timings ...................................................................................................217
图示 13.30 – 重新开始重置 sequence ..................................................................................................................219
图示 14.1 - 128 管脚 qfp 包装 外形,14x20x2.7 身体,3.2mm foot打印 ......................................................220
图示 15.1 – 例子xor chain电路系统..............................................................................................................221
列表 的 tables
表格 3.1 - lpc47m182 管脚 description ......................................................................................................................14
表格 3.2 – 管脚 和内部的 resistors .......................................................................................................................23
表格 3.3 – 管脚 那 require 外部电阻器.........................................................................................................24
表格 3.4 – default 状态 的管脚..................................................................................................................................25
表格 6.1 – 超级的 i/o 块 logical设备 号码和 addresses ..........................................................................33
表格 6.2 - 状态, 数据和 控制寄存器............................................................................................................38
表格 6.3 - 内部的 2驱动 decode– 正常的..............................................................................................................43
表格 6.4 - 内部的 2 驱动decode – 驱动0 和 1 swapped ..................................................................................43
表格 6.5 - 录音带选择 位.........................................................................................................................................44
表格 6.6 - drive 类型ID .............................................................................................................................................44
表格 6.7 - precompensation延迟 ...........................................................................................................................45
表格 6.8 - data rates .................................................................................................................................................46
表格 6.9 - drvden mapping .....................................................................................................................................46
表格 6.10 - default precompensati在 delays.............................................................................................................47
表格 6.11 - 先进先出维护延迟..................................................................................................................................48
表格 6.12 - 状态寄存器 0 .....................................................................................................................................51
表格 6.13 - 状态寄存器 1 .....................................................................................................................................52
表格 6.14 - 状态寄存器 2 .....................................................................................................................................52
表格 6.15 - 状态寄存器 3 .....................................................................................................................................53
表格 6.16 – 描述的 command symbols ..........................................................................................................56
表格 6.17 - instruction设置 ..........................................................................................................................................59
表格 6.18 - sector sizes.............................................................................................................................................65
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