CC2430
CC2430
初步的 数据 薄板 (rev. 1.03) swrs036a 页 4 的 232
12.7
I
NTERRUPTS
...........................................................................................................................52
12.8
O
scillators 和 clocks
....................................................................................................62
12.9
D
EBUG
I
NTERFACE
.................................................................................................................62
12.10
内存......................................................................................................................................66
12.11
F
LASH
M
EMORY
.....................................................................................................................66
12.12
M
EMORY
一个
RBITER
.................................................................................................................66
13
peripherals........................................................................................................................69
13.1
i/o
端口
...............................................................................................................................69
13.2
DMA
C
ONTROLLER
...............................................................................................................86
13.3
16-
位
T
IMER
,
T
IMER
1 ...........................................................................................................98
13.4
MAC
T
IMER
(t
IMER
2) ........................................................................................................110
13.5
S
LEEP
T
IMER
........................................................................................................................117
13.6
8-
位
T
IMER
3
和
T
IMER
4 .................................................................................................118
13.7
模数转换器.....................................................................................................................................127
13.8
R
ANDOM
N
UMBER
G
ENERATOR
...........................................................................................133
13.9
AES
C
OPROCESSOR
..............................................................................................................135
13.10
P
OWER
M
ANAGEMENT
.........................................................................................................140
13.11
P
OWER
O
N
R
eset 和
B
ROWN
O
UT
D
ETECTOR
..................................................................144
13.12
W
ATCHDOG
T
IMER
...............................................................................................................145
13.13
通用同步/异步串行接收/发送器................................................................................................................................147
13.14
F
LASH
C
ONTROLLER
............................................................................................................157
14
无线电.....................................................................................................................................164
14.1
IEEE
802.15.4
M
ODULATION
F
ORMAT
................................................................................165
14.2
C
ommand strobes
.............................................................................................................166
14.3
RF
R
EGISTERS
......................................................................................................................166
14.4
I
NTERRUPTS
.........................................................................................................................166
14.5
先进先出
进入
........................................................................................................................169
14.6
dma....................................................................................................................................170
14.7
R
eceive 模式
.....................................................................................................................170
14.8
RXFIFO
OVERFLOW
............................................................................................................170
14.9
T
ransmit 模式
..................................................................................................................171
14.10
G
eneral 控制 和 状态
.........................................................................................172
14.11
D
EMODULATOR
,
S
YMBOL
S
ynchronizer 和
D
ATA
D
ECISION
.........................................172
14.12
F
RAME
F
ORMAT
...................................................................................................................173
14.13
S
ynchronization 标头
.................................................................................................173
14.14
L
ength 地方
......................................................................................................................174
14.15
MAC
协议 数据 单位
................................................................................................175
14.16
F
rame 审查 sequence
.....................................................................................................175
14.17
RF
D
ATA
B
UFFERING
...........................................................................................................176
14.18
一个
DDRESS
R
ECOGNITION
.......................................................................................................177
14.19
一个
CKNOWLEDGE
F
RAMES
......................................................................................................178
14.20
R
adio 控制 状态 机器
........................................................................................179
14.21
MAC
S
ECURITY
O
PERATIONS
(e
ncryption 和
一个
UTHENTICATION
).................................181
14.22
L
INEAR
如果
和
AGC
S
ETTINGS
...........................................................................................181
14.23
RSSI
/
E
NERGY
D
ETECTION
.................................................................................................181
14.24
L
INK
Q
UALITY
I
NDICATION
..................................................................................................182
14.25
C
LEAR
C
HANNEL
一个
SSESSMENT
............................................................................................182
14.26
F
requency 和
C
HANNEL
P
ROGRAMMING
........................................................................183
14.27
VCO
和
PLL
S
ELF
-c
ALIBRATION
.....................................................................................183
14.28
O
UTPUT
P
OWER
P
ROGRAMMING
..........................................................................................183
14.29
I
NPUT
/
O
UTPUT
M
ATCHING
.................................................................................................184
14.30
T
RANSMITTER
T
EST
M
ODES
.................................................................................................184
14.31
S
YSTEM
C
onsiderations 和
G
UIDELINES
.......................................................................186
14.32
PCB
L
AYOUT
R
ECOMMENDATION
.......................................................................................188
14.33
一个
NTENNA
C
ONSIDERATIONS
................................................................................................189
14.34
csma/ca
S
TROBE
P
ROCESSOR
..........................................................................................189
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