Bank
号码
vref bank 管脚 名字/函数 optional 函数(s) 配置
函数
F484 B672 F672 F780 dqs 为 x32
DIFFIO
速 (1)
管脚 信息 为 这 stratix™ ep1s10 设备, ver 3.7
(便条 2)
B8 VREF1B8 IO DQ6B1 W14 AB10 AB10 AE18 DQ1B1
B8 VREF1B8 IO DQ6B0 V14 AF10 AF10 AG18 DQ1B0
B8 VREF1B8 IO RDN8 P15 AB11 AB11 Y19
B8 VREF1B8 IO RUP8 N15 AE11 AE11 W19
B8 VREF1B8 IO W18
B8 VREF1B8 IO RDYnBSY P14 AC11 AC11 AA19
B8 VREF1B8 IO nCS T14 Y11 Y11 Y18
B8 VREF1B8 IO CS P13 AA11 AA11 AA18
B8 VREF1B8 VREF1B8 R16 AE9 AE9 AD20
B8 VREF1B8 IO CLK5n W13 AD12 AD12 Y17
B8 VREF1B8 CLK5p V13 AC12 AC12 AA17
B8 VREF1B8 IO CLK4n Y14 AF12 AF12 AB17
B8 VREF1B8 CLK4p AA14 AE12 AE12 AC17
B8 VREF1B8 pll_ena pll_ena R13 W12 W12 AC18
B8 VREF1B8 MSEL0 MSEL0 T13 Y12 Y12 AC16
B8 VREF1B8 MSEL1 MSEL1 P12 Y13 Y13 W17
B8 VREF1B8 MSEL2 MSEL2 R12 W13 W13 AB15
B12 VREF1B8 IO pll6_out3n Y16
B12 VREF1B8 IO pll6_out3p W16
B12 VREF1B8 IO pll6_out2n AG15
B12 VREF1B8 IO pll6_out2p AF15
B11 VREF1B8 IO pll6_fbn Y12 AB12 AB12 AA15
B11 VREF1B8 IO pll6_fbp W12 AA12 AA12 AA14
B11 VREF1B8 IO pll6_out1n AB12 AB14 AB14 W15
B11 VREF1B8 IO pll6_out1p AA12 AA14 AA14 W14
B11 VREF1B8 IO pll6_out0n Y13 AB13 AB13 AE15
B11 VREF1B8 IO pll6_out0p AA13 AA13 AA13 AD15
B12 vcc_pll6_outb AB16
B11 vcc_pll6_outa AC14
B11 vcc_pll6_outa U13 AE13 AE13
vcca_pll6 T12 AD14 AD14 AG14
地
gnda_pll6 U12 AC14 AC14 AF14
vccg_pll6 U11 AD13 AD13 AA13
gndg_pll6 T11 AE14 AE14 AB14
B7 VREF0B7 CLK7p AA11 AE15 AE15 W13
B7 VREF0B7 IO CLK7n Y13
B7 VREF0B7 CLK6p AB11 AF15 AF15 AD14
B7 VREF0B7 IO CLK6n AE14
B7 VREF0B7 nCE nCE R11 Y14 Y14 AB13
B7 VREF0B7 nCEO nCEO P11 W14 W14 AC13
B7 VREF0B7 IO Y9
B7 VREF0B7 IO R8 AE4
B7 VREF0B7 IO PGM0 N10 W15 W15 W12
B7 VREF0B7 nio_pullup nio_pullup N9 AA15 AA15 Y12
B7 VREF0B7 VCCSEL VCCSEL R10 Y15 Y15 AA12
B7 VREF0B7 PORSEL PORSEL U10 W16 W16 AC12
B7 VREF0B7 IO init_完毕 P10 AC15 AC15 W11
B7 VREF0B7 IO nRS T10 Y16 Y16 AC11
B7 VREF0B7 IO RUnLU P9 AD15 AD15 W10
B7 VREF0B7 IO PGM1 M8 AC16 AC16 AA11
B7 VREF0B7 IO RDN7 T9 AB16 AB16 AC10
B7 VREF0B7 IO RUP7 N8 AD16 AD16 AB11
B7 VREF0B7 VREF0B7 R9 AB15 AB15 AD11
B7 VREF0B7 IO DQ3B7 AA8 W17 W17 AG11 DQ0B31
B7 VREF0B7 IO DQ3B6 Y9 AE16 AE16 AH11 DQ0B30
B7 VREF0B7 IO DQ3B5 Y8 Y17 Y17 AE11 DQ0B29
B7 VREF0B7 IO dev_clrn P8 AF17 AF17 AC9
B7 VREF0B7 IO DQ3B4 U9 AA17 AA17 AF11 DQ0B28
B7 VREF0B7 IO DQ3B3 V9 Y18 Y18 AE10 DQ0B27
B7 VREF0B7 IO DQS3B W8 AE17 AE17 AG10
B7 VREF0B7 IO DQ3B2 W9 W18 W18 AH10 DQ0B26
B7 VREF0B7 IO DQ3B1 V8 AB17 AB17 AF10 DQ0B25
B7 VREF0B7 IO DQ3B0 U8 AA18 AA18 AD10 DQ0B24
B7 VREF0B7 IO FCLK5 T8 AC17 AC17 AC8
B7 VREF0B7 IO FCLK4 M7 AD17 AD17 AB10
B7 VREF1B7 IO DQ2B7 W7 AF18 AF18 AG9 DQ0B23
B7 VREF1B7 IO DQ2B6 U6 AF9 DQ0B22
B7 VREF1B7 IO DQ2B5 AB8 AF19 AF19 AE9 DQ0B21
B7 VREF1B7 IO DQ2B4 V6 Y20 Y20 AH8 DQ0B20
B7 VREF1B7 IO DQ2B3 AB7 AA19 AA19 AH9 DQ0B19
pt-ep1s10-3.7
版权 © 2006 altera corp.
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