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2.3.5tightlycoupledmemory(tcm)
2.3.6advancedhigh-performancebus(ahb)
2.3.7embeddedtracemacrocell(etm)andembeddedtracebuffer(etb)
2.3.8armmemorymapping
TMS320DM6443
digitalmediasystemon-碎片
SPRS282–DECEMBER2005
•
cachemaintenanceoperationsprovideefficientinvalidationof,theentiredcacheoricache,regionsof
thedcacheoricache,andregionsofvirtualmemory.
thewritebufferisusedforallwritestoanoncachablebufferableregion,写-throughregionandwrite
missestoawrite-backregion.aseparatebufferisincorporatedinthedcacheforholdingwrite-backfor
cachelineevictionsorcleaningofdirtycachelines.themainwritebufferhas16-worddatabufferanda
四-addressbuffer.thedcachewrite-backhaseightdatawordentriesandasingleaddressentry.
arminternalramisprovidedforstoringreal-timeandperformance-criticalcode/dataandtheinterrupt
vectortable.arminternalromenablesnon-emifabootoptions,suchasnandanduart.theram
andrommemoriesinterfacedtothearm926ej-sviathetightlycoupledmemoryinterfacethatprovides
forseparateinstructionanddatabusconnections.sincethearmtcmdoesnotallowinstructionsonthe
d-tcmbusordataonthei-tcmbus,anarbiterisincludedsothatbothdataandinstructionscanbe
storedintheinternalram/只读存储器.thearbiteralsoallowsaccessestotheram/romfromextra-arm
来源(e.g.,edmaorothermasters).thearm926ej-shasbuilt-indmasupportfordirectaccessesto
thearminternalmemoryfromanon-armmaster.becauseofthetime-criticalnatureofthetcmlinkto
thearminternalmemory,allaccessesfromnon-armdevicesaretreatedasdmatransfers.
instructionanddataaccessesaredifferentiatedviaaccessingdifferentmemorymapregions,withthe
instructionregionfrom0x0000through0x7fffanddatafrom0x8000through0xffff.placingthe
instructionregionat0x0000isnecesssarytoallowthearminterruptvectortabletobeplacedat0x0000,
asrequiredbythearmarchitecture.theinternal16-kbramissplitintotwophysicalbanksof8kb
各自,whichallowssimultaneousinstructionanddataaccessestobeaccomplishedifthecodeanddata
areinseparatebanks.
thearm926ej-shasbuiltindmasupportfordirectaccessestothearminternalmemoryfromanon-
armdevice.此外,becauseofthetimecriticalnatureofthetcmlinktothearminternalmemory,
allaccessesfromnon-armdevicesaretreatedasdmatransfers.
thearmsubsystemusestheahbportofthearm926ej-stoconnectthearmtotheconfigbusand
theexternalmemories.arbitersareemployedtoarbitrateaccesstotheseparated-ahbandi-ahbbythe
configbusandtheexternalmemoriesbus.
tosupportreal-timetrace,thearm926ej-sprocessorprovidesaninterfacetoenableconnectionofan
embeddedtracemacrocell(etm).thearm926es-jsubsystemindm644xalsoincludesthe
embeddedtracebuffer(etb).theetmconsistsoftwoparts:
•
traceportprovidesreal-timetracecapabilityforthearm9.
•
triggeringfacilitiesprovidetriggerresources,whichincludeaddressanddatacomparators,计数器,
andsequencers.
thedm644xtraceportisnotpinnedoutandisinsteadonlyconnectedtotheembeddedtracebuffer.
theetbhasa4kbbuffermemory.etbenableddebugtoolsarerequiredtoread/interpretthecaptured
tracedata.
thearmmemorymapisshowninthememorymapsectionofthisdocument.thearmhasaccessto
memoriesshowninthefollowingsections.
DeviceOverview
10
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