cx82100 home 网络 处理器 数据 薄板
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conexant 专卖的 和 confidential 信息
101306C
2 cx82100 hnp 硬件 接口....................................................................................................... 2-1
2.1 cx82100 hnp 硬件 接口 信号 ..................................................................................................................2-1
2.1.1 cx82100-11/-12/-51/-52 信号 接口 和 管脚 assignments..................................................................2-1
2.1.2 cx82100-41/-42 信号 接口 和 管脚 assignments...............................................................................2-1
2.1.3 cx82100 hnp 信号 定义 .................................................................................................................2-1
2.2 cx82100 hnp 电的 和 自然环境的 规格........................................................................................2-17
2.2.1 直流 电的 特性 ......................................................................................................................2-17
2.2.2 运行 情况, 绝对 最大 比率, 和 电源 消耗量............................................2-18
2.3 optional gpio 和 host 信号 用法 .......................................................................................................................2-19
2.4 接口 定时 和 波形...............................................................................................................................2-21
2.4.1 外部 记忆 接口 (sdram).........................................................................................................2-21
2.4.2 host 接口 定时 ................................................................................................................................2-21
2.4.3 emac 接口 定时..............................................................................................................................2-21
2.4.4 usb 接口 定时.................................................................................................................................2-21
2.4.5 gpio 接口 定时 ...............................................................................................................................2-21
2.4.6 中断 定时 ........................................................................................................................................2-22
2.4.7 时钟 重置 定时....................................................................................................................................2-22
2.4.8 重置 定时 .............................................................................................................................................2-22
2.5 包装 维度 .................................................................................................................................................2-23
3 hnp 记忆 architecture ................................................................................................................... 3-1
3.1 hnp 记忆 编排.......................................................................................................................................................3-1
3.2 开始 地址......................................................................................................................................................3-3
3.2.1 arm vector 表格........................................................................................................................................3-3
3.3 Endianness..................................................................................................................................................................3-4
3.4 激励 程序 ...........................................................................................................................................................3-4
4 dmac 接口 描述................................................................................................................. 4-1
4.1 dma 频道 定义 ..............................................................................................................................................4-1
4.2 dma requests 和 数据 转移................................................................................................................................4-1
4.3 控制 寄存器 ........................................................................................................................................................4-2
4.4 dmac 寄存器 记忆 编排......................................................................................................................................4-3
4.5 控制 寄存器 formats.............................................................................................................................................4-4
4.5.1 dmac x 电流 pointer 1 (dmac_{x}_ptr1) ...............................................................................................4-4
4.5.2 dmac x 间接的/返回 pointer 1 (dmac_{x}_ptr2)....................................................................................4-4
4.5.3 dmac x 缓存区 大小 计数器 1 (dmac_{x}_cnt1).........................................................................................4-4
4.5.4 dmac x 缓存区 大小 计数器 2 (dmac_{x}_cnt2).........................................................................................4-4
4.5.5 dmac x 缓存区 大小 计数器 3 (dmac_{x}_cnt3).........................................................................................4-5
4.6 三 基本 模式 的 地址 一代 ..................................................................................................................4-6
4.6.1 源 或者 destination 模式 ........................................................................................................................4-6
4.6.2 圆形的 缓存区 模式..................................................................................................................................4-6
直接 圆形的 缓存区 ...........................................................................................................................4-6
间接的 圆形的 pointer 表格..............................................................................................................4-7
4.6.3 linked 列表 模式.........................................................................................................................................4-9
embedded tail linked 列表 descriptor 模式 ........................................................................................4-9
间接的/表格 linked 列表 descriptor 模式........................................................................................4-12
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