RELEASED
pm7366 freedm-8
数据 薄板
pmc-1970930 公布 4 框架 engine 和 数据 link manager
专卖的 和 confidential 至 pmc-sierra,inc., 和 为 它的 客户’ 内部的 使用
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内容
1 特性 ....................................................................................................................... 1
2 产品 ................................................................................................................ 3
3 references.................................................................................................................. 4
4 应用EXAMPLES .............................................................................................. 5
5 块 diAGRAM ............................................................................................................ 6
6 描述.................................................................................................................. 7
7 管脚 图解...................................................................................................................9
8 管脚 描述..........................................................................................................11
9 函数的 描述........................................................................................ 33
9.1 高-水平的 数据 link 控制 协议 ........................................... 33
9.2 receive channel assignER ...................................................................... 34
9.2.1 线条 接口............................................................................. 34
9.2.2 priority encoder...................................................................... 34
9.2.3 频道ASSIGNER ..................................................................... 35
9.2.4 loopback 控制 ............................................................ 35
9.3 receive hdlc 处理器 / partial 小包装板盒 缓存区 ........................ 35
9.3.1 hdlc 处理器 ........................................................................ 36
9.3.2 partial 小包装板盒缓存区 处理器..................................... 36
9.4 receive dma 控制 ......................................................................... 38
9.4.1 数据 结构 ....................................................................... 38
9.4.2 dma transaction 控制 ............................................. 48
9.4.3 Write 数据 pipeline/mux.......................................................... 48
9.4.4 descriptor 信息 cache........................................... 48
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