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1TMS320VC5416Features
TMS320VC5416
fixed-pointdigitalsignalprocessor
SPRS095O–MARCH1999–REVISEDJANUARY2005
•
ArithmeticInstructionsWithParallelStoreand
•
AdvancedMultibusArchitectureWithThree
ParallelLoad
separate16-bitdatamemorybusesandone
ProgramMemoryBus
•
ConditionalStoreInstructions
•
40-bitarithmeticlogicunit(alu)includinga
•
FastReturnFromInterrupt
40-bitbarrelshifterandtwoindependent
•
在-chipperipherals
40-bitaccumulators
–software-programmablewait-状态
•
17-
×
17-bitparallelmultipliercoupledtoa
GeneratorandProgrammable
40-bitdedicatedadderfornon-pipelined
bank-切换
单独的-cyclemultiply/accumulate(mac)
–on-chipprogrammablephase-锁
运作
循环(pll)clockgeneratorwithexternal
ClockSource
•
对比,选择,andstoreunit(cssu)forthe
–one16-bittimer
增加/compareselectionoftheviterbioperator
–six-channeldirectmemoryaccess(dma)
•
ExponentEncodertoComputeanExponent
控制
valueofa40-bitaccumulatorvalueina
–ThreeMultichannelBufferedSerialPorts
SingleCycle
(mcbsps)
•
TwoAddressGeneratorsWithEightAuxiliary
–8/16-bitenhancedparallelhost-端口
RegistersandTwoAuxiliaryRegister
接口(hpi8/16)
arithmeticunits(araus)
•
powerconsumptioncontrolwithidle1,
•
DataBusWithaBusHolderFeature
idle2,andidle3instructionswith
•
ExtendedAddressingModefor8M
×
16-位
电源-downmodes
MaximumAddressableExternalProgram
•
CLKOUTOffControltoDisableCLKOUT
空间
•
在-chipscan-basedemulationlogic,ieee
•
128kx16-biton-chipramcomposedof:
std1149.1(jtag)boundaryscanlogic
(1)
–EightBlocksof8K
×
16-biton-碎片
•
144-pinballgridarray(bga)(ggusuffix)
双-accessprogram/dataram
•
144-pinlow-profilequadflatpack
–EightBlocksof8K
×
16-biton-碎片
(lqfp)(pgesuffix)
单独的-accessprogramram
•
6.25-nssingle-cyclefixed-pointinstruction
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16K
×
16-biton-chipromconfiguredfor
executiontime(160mips)
ProgramMemory
•
8.33-nssingle-cyclefixed-pointinstruction
•
enhancedexternalparallelinterface(xio2)
executiontime(120mips)
•
单独的-操作指南-repeatandblock-repeat
•
3.3-vi/osupplyvoltage(160and120mips)
OperationsforProgramCode
•
1.6-vcoresupplyvoltage(160mips)
•
块-记忆-moveinstructionsforbetter
ProgramandDataManagement
•
1.5-vcoresupplyvoltage(120mips)
•
instructionswitha32-bitlongwordoperand
•
instructionswithtwo-orthree-operand
(1)ieeestandard1149.1-1990standard-测试-accessportand
读
BoundaryScanArchitecture
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copyright©1999–2005,texasinstrumentsincorporated
ProductsconformtospecificationsperthetermsoftheTexas
instrumentsstandardwarranty.productionprocessingdoesnot
necessarilyincludetestingofallparameters.