www.德州仪器.com
APPLICATIONINFORMATION
Host
控制
tx 时钟
Lvds 驱动器
目标
控制
目标
indicates twisting 的 这
conductors.
T
T
T
T
T
indicates 这 线条 末端
电路.
Host
保持平衡 interconnect
电源 电源
DB0
DB1
DB2
DBn–3
T
T
T
T
DBn–2
DBn–1
DBn
rx 时钟
DB0
DB1
DB2
DBn–3
DBn–2
DBn–1
DBn
Lvdx368, lVDx388
Lvdx388a, 或者 lVDx390
analoganddigitalgrounds/powersupplies
FAILSAFE
sn65lvds386/388a/390,sn65lvdt386/388a/390
sn75lvds386/388a/390,sn75lvdt386/388a/390
SLLS394G–SEPTEMBER1999–REVISEDNOVEMBER2004
figure12.typicalapplicationschematic
althoughitisnotnecessarytoseparateouttheanalog/digitalsuppliesandgroundsonthesn65lvds/t388a
andsn75lvds/t388a,thepinoutprovidestheuserthatoption.tohelpminimizeorperhapseliminateswitching
noisebeingcoupledbetweenthetwosupplies,theusercouldlayoutseparatesupplyandgroundplanesforthe
designatedpinout.
mostapplicationsprobablyhaveallgroundsconnectedtogetherandallpowersuppliesconnectedtogether.这个
configurationwasusedwhilecharacterizingandsettingthedata-sheetparameters.
Oneofthemostcommonproblemswithdifferentialsignalingapplicationsishowthesystemrespondswhenno
differentialvoltageispresentonthesignalpair.thelvdsreceiverislikemostdifferentiallinereceivers,inthat
itsoutputlogicstatecanbeindeterminatewhenthedifferentialinputvoltageisbetween–100mvand100mv,
andwithinitsrecommendedinputcommon-modevoltagerange.德州仪器'slvdsreceiverisdifferentinhowithandles
theopen-inputcircuitsituation,不管怎样.
打开-circuitmeansthatthereislittleornoinputcurrenttothereceiverfromthedatalineitself.thiscouldbe
whenthedriverisinahigh-impedancestateorthecableisdisconnected.whenthisoccurs,thelvdsreceiver
pullseachlineofthesignalpairtonearV
CC
through300-k
Ω
电阻器,asshowninfigure13.thefail-safe
featureusesanandgatewithinputvoltagethresholdsatabout2.3vtodetectthisconditionandforcethe
outputtoahigh-水平的,regardlessofthedifferentialinputvoltage.
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