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资料编号:590447
 
资料名称:TMS470R1A64
 
文件大小: 381.48K
   
说明
 
介绍:
16/32-Bit RISC Flash Microcontroller
 
 


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本平台电子爱好着纯手工中文简译:截至2020/5/17日,支持英文词汇500个
www.德州仪器.com
ADVance informaTION
TMS470R1A64
16/32-bitriscflashmicrocontroller
SPNS099–NOVEMBER2004
高-performancestaticcmostechnology
异步的/isosynchronousmodes
tms470r1x16/32-bitrisccore
–standardcancontroller(scc)
(arm7tdmi™)
–16-mailboxcapacity
–24-mhzsystemclock(48-mhzpipeline
fullycompliantwithcanprotocol,版本
模式)
2.0b
–independent16/32-bitinstructionset
–classiiserialinterface(c2sia)
–openarchitecturewiththird-partysupport
TwoSelectableDataRates
–built-indebugmodule
normalmode10.4kbpsand4xmode41.6
–big-endianformatutilized
Kbps
IntegratedMemory
高-endtimer(het)
–64k-byteprogramflash
–13programmablei/ochannels:
OneBankWithFiveContiguousSectors
12high-resolutionpins
InternalStateMachineforProgramming
1standard-resolutionpin
andErase
–high-resolutionsharefeature(xor)
–4k-bytestaticram(sram)
–hetram(64-instructioncapacity)
OperatingFeatures
10-bitmulti-bufferedadc(mibadc)
–coresupplyvoltage(vcc):1.71v–2.05v
8-频道
–i/osupplyvoltage(vccio):3.0v–3.6v
–64-wordfifobuffer
–low-powermodes:standbyandhalt
–single-orcontinuous-conversionmodes
–IndustrialTemperatureRanges
–1.55
µ
sMinimumSampleandConversion
时间
470+SystemModule
–calibrationmodeandself-testfeatures
–32-bitaddressspacedecoding
SixExternalInterrupts
–BusSupervisionforMemoryand
Peripherals
FlexibleInterruptHandling
–analogwatchdog(awd)计时器
5dedicatedgeneral-purposei/o(gio)管脚,1
输入-onlygiopin,and34additional
–real-timeinterrupt(rti)
peripherali/os
–SystemIntegrityandFailureDetection
externalclockprescale(ecp)单元
零-pinphase-lockedloop(zpll)-为基础
–programmablelow-frequencyexternal
ClockModuleWithPrescaler
时钟(clk)
–multiply-用-4or-8internalzplloption
在-chipscan-baseemulationlogic,ieee
–ZPLLBypassMode
standard1149.1
(1)
(jtag)测试-accessport
sixcommunicationinterfaces:
80-pinplasticlow-profilequadflatpack(pn
–twoserialperipheralinterfaces(spis)
后缀)
255ProgrammableBaudRates
(1)thetest-accessportiscompatiblewiththeieeestandard
1149.1-1990,ieeestandardtest-accessportandboundary
–twoserialcommunicationinterfaces(scis)
scanarchitecturespecification.boundaryscanisnotsup-
2
24
SelectableBaudRates
portedonthisdevice.
arm7tdmiisatrademarkofadvancedriscmachines(arm)限制.
ADVANCEINFORMATIONconcernsnewproductsinthesampling
copyright©2004,texasinstrumentsincorporated
orpreproductionphaseofdevelopment.characteristicdataand
otherspecificationsaresubjecttochangewithoutnotice.
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