先进的 i/o 控制 和 motherboard glue 逻辑
数据手册
修订 1.8
smsc/非-smsc 寄存器 sets
(02-24-05)
10
smsc lpc47m182
数据手册
表格 7.47 – latched backfeed截 sequence 1和 2 德州仪器ming .................................................................................150
表格 7.48 – nrSMRST管脚.......................................................................................................................................152
表格 7.49 –cnr pins ..............................................................................................................................................152
表格 7.50 – cnr logic 真实表格..........................................................................................................................153
表格 8.1 – 电源 控制 runtime registers summary, ld_num 位 = 0...............................................................154
表格 8.2 – 电源 控制runtime 寄存器s 描述, ld_num 位 = 0 ............................................................155
表格 9.1 – gpio runtime registers summary,ld_num = 0..................................................................................161
表格 9.2 – gpio runtime registers 描述,ld_num = 0 ...............................................................................162
表格 10.1 – runtime register 块 runtime 寄存器s summary ..........................................................................165
表格 11.1– lpc47m182 配置 registers summary, ld_num 位 = 0 .........................................................170
表格 11.2 – lpc47m182 configuration寄存器 summary,ld_num 位 = 1.........................................................172
表格 11.3 – 碎片水平的 registers .............................................................................................................................174
表格 11.4 – logical设备 registers.......................................................................................................................177
表格 11.5 – primary interrupt 选择 configurati在 寄存器Description .................................................................179
表格 11.6 – dma 频道 选择 configuration register description......................................................................179
表格 11.7 – logical 设备i/o 地址, ld_num 位 = 0 ......................................................................................181
表格 11.8 – logical 设备 i/o地址, ld_num 位 = 1 .......................................................................................182
表格 11.9 – floppy disk 控制 logical 设备 configuration registers ............................................................184
表格 11.10 – 串行 端口 2 logical设备 configuration registers ..........................................................................187
表格 11.11 – 并行的 端口 logical设备 configuration registers ..........................................................................188
表格 11.12 – 串行 端口 1 logical设备 configuration registers ..........................................................................189
表格 11.13 – 键盘 logical de恶行 configuration 寄存器 ..............................................................................190
表格 11.14 – 电源 控制/runtime 寄存器 块 logical 设备配置寄存器s.................................191
表格 12.1 – operational 直流 characteristics.............................................................................................................192
表格 12.2 – s3-s5备用物品Current .........................................................................................................................197
表格 13.1 – nide_rstdrv定时..........................................................................................................................217
表格 13.2 – npcirst_输出和 npcirst_out2 德州仪器ming .......................................................................................217
表格 13.3 – ps_在 德州仪器ming ......................................................................................................................................217
表格 13.4 – sck_bjt_门 定时 .......................................................................................................................218
表格 13.5 – pwrgd_PLATFORM定时 ...............................................................................................................218
表格 13.6 – cnr codec向下 enable timing.......................................................................................................218
表格 13.7 – 重新开始重置定时...........................................................................................................................219
表格 14.1 – 128 管脚 qfp 包装 parameters .......................................................................................................220
表格 15.1 – xor 测试模式例子 ...................................................................................................................222