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资料编号:216001
 
资料名称:CDCM7005RGZT
 
文件大小: 1529.8K
   
说明
 
介绍:
3.3-V HIGH PERFORMANCE CLOCK SYNCHRONIZER AND JITTER CLEANER
 
 


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本平台电子爱好着纯手工中文简译:截至2020/5/17日,支持英文词汇500个
www.德州仪器.com
ABSOLUTEMAXIMUMRATINGS
CDCM7005
SCAS793A–JUNE2005–REVISEDJUNE2005
table1.pinassingment(持续)
终端
i/odescription
NAMEBGAQFN
biasvoltageoutputtobeusedtobiasunusedcomplementaryinputvcxo_infor
vbbc140osingleendedsignals.theoutputofvbbisv
CC
–1.3v.theoutputcurrentis
limitedtoabout1.5ma.
thisoutputcanbeprogrammed(spi)toprovideeitherthestatus_refor
pri_秒_clkinformation.thispinissethighifoneofthestatusconditionsis
有效的.状态_refisthedefaultsetting.
状态_reforincaseofstatus_ref,thelvcmosoutputprovidesthestatusofthe
C823O
pri_秒_clkreferenceclock.ifareferenceclockwithafrequencyabove2mhzisprovidedto
pri_reforsec_refstatus_refwillbesethigh.
incaseofpri_秒_clk,thelvcmosoutputindicateswhethertheprimary
clock[high]orthesecondaryclock[low]isselected.
thislvcmosoutputcanbeprogrammed(spi)toprovideeitherthe
状态_vcxoinformationorserveascurrentpathforthechargepump(cp).
状态_vcxoisthedefaultsetting.
incaseofstatus_vcxo,thelvcmosoutputprovidesthestatusofthevcxo
状态_vcxo
d822oinput(frequenciesabove2mhzareinterpretedasvalidclock;activehigh).
ori_ref_cp
incaseofi_ref_cp,itprovidesthecurrentpathfortheexternalreference
电阻(12k
Ω±
1%)tosupportanaccuratechargepumpcurrent,optional.donot
useanycapacitoracrossthisresistortopreventnoisecouplingviathisnode.如果
theinternal12k
isselected(defaultsetting),thispincanbeleftopen.
lvcmosoutputforpll_lockinformation.thispinissethighifthepllisin
锁(seefeaturedescription).thisoutputcanbeprogrammedtobedigitallock
detectoranaloglockdetect(seefeaturedescription).
thepllislocked(sethigh),iftherisingedgeeitherofpri_reforsec_ref
clockandvcxo_inclockatthephasefrequencydetector(pfd)areinsidethe
lockdetectwindowforapredeterminednumberofsuccessiveclockcycles.
pll_locka825i/o
thepllisout-的-锁(setlow),iftherisingedgeofeitherthepri_refor
秒_ref)clockandvcxo_inclockatthepfdareoutsidethelockdetect
windoworifacycle-slipoccurs.
两个都,thelockdetectwindowandthenumberofsuccessiveclockcyclesareuser
definable(viaspi).
y0a:y0bf1,g1,46,47,
TheoutputsoftheCDCM7005areuserdefinableandcanbeanycombinationof
y1a:y1bh2,h3,3,4,
uptofivelvpecloutputsorupto10lvcmosoutputs.theoutputsare
y2a:y2bh4,h5,7,8,o
selectableviaspi(word1,bit2-6).thepower-upsettingisalloutputsare
y3a:y3bh6,h7,11,12,
lvpecl.
y4a:y4bg8,f816,17
overoperatingfree-airtemperaturerange(unlessotherwisenoted)
(1)
值/单位
V
CC
,一个
VCC
,v
cc_cp
Supplyvoltagerange
(2)
–0.5vto4.6v
V
I
Inputvoltagerange
(3)
–0.5vtov
CC
+0.5v
V
O
Outputvoltagerange
(3)
–0.5vtov
CC
+0.5v
I
输出
outputcurrentforlvpecl/lvcmosoutputs
±
50mA
(0<v
O
<v
CC
)
I
inputcurrent(v
I
<0,v
I
>v
CC
)
±
20mA
T
stg
Storagetemperaturerange–65
°
Cto150
°
C
T
J
Maximumjunctiontemperature125
°
C
(1)stressesbeyondthoselistedunder
absolutemaximumratings
maycausepermanentdamagetothedevice.thesearestressratings
仅有的,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder
recommendedoperating
情况
isnotimplied.exposuretoabsolute–maximum–ratedconditionsforextendedperiodsmayaffectdevicereliability.
(2)allsupplyvoltageshavetobesuppliedatthesametime.
(3)theinputandoutputnegativevoltageratingsmaybeexceedediftheinputandoutputclamp-currentratingsareobserved.
5
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