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TMS320VC5416
fixed-pointdigitalsignalprocessor
SPRS095O–MARCH1999–REVISEDJANUARY2005
RevisionHistory
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2
1TMS320VC5416Features
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9
2Introduction
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10
2.1description..................................................................................................................10
2.2pinassignments............................................................................................................10
2.2.1terminalassignmentsfortheggupackage...............................................................10
2.2.2pinassignmentsforthepgepackage......................................................................12
2.2.3signaldescriptions..............................................................................................13
3FunctionalOverview
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16
3.1memory......................................................................................................................16
3.1.1datamemory.....................................................................................................16
3.1.2programmemory................................................................................................18
3.1.3extendedprogrammemory...................................................................................18
3.2on-chipromwithbootloader...........................................................................................18
3.3on-chipram...............................................................................................................19
3.4on-chipmemorysecurity.................................................................................................19
3.5memorymap................................................................................................................20
3.5.1relocatableinterruptvectortable............................................................................21
3.6on-chipperipherals.......................................................................................................23
3.6.1software-programmablewait-stategenerator.............................................................23
3.6.2programmablebank-切换................................................................................25
3.6.3busholders......................................................................................................26
3.7paralleli/oports...........................................................................................................26
3.7.1enhanced8-/16-bithost-portinterface(hpi8/16)..........................................................27
3.7.2hpinonmultiplexedmode......................................................................................28
3.8multichannelbufferedserialports(mcbsps)..........................................................................30
3.9hardwaretimer............................................................................................................32
3.10clockgenerator............................................................................................................32
3.11enhancedexternalparallelinterface(xio2)...........................................................................34
3.12dmacontroller.............................................................................................................37
3.12.1features..........................................................................................................37
3.12.2dmaexternalaccess...........................................................................................37
3.12.3dmamemorymaps.............................................................................................39
3.12.4dmaprioritylevel...............................................................................................40
3.12.5dmasource/destinationaddressmodification.............................................................40
3.12.6dmainautoinitializationmode................................................................................41
3.12.7dmatransfercounting.........................................................................................41
3.12.8dmatransferindoublewordmode..........................................................................42
3.12.9dmachannelindexregisters.................................................................................42
3.12.10dmainterrupts..................................................................................................42
3.12.11dmacontrollersynchronizationevents....................................................................42
3.13general-purposei/opins.................................................................................................43
3.13.1mcbsppinsasgeneral-purposei/o.........................................................................43
3.13.2hpidatapinsasgeneral-purposei/o......................................................................44
3.14deviceidregister.........................................................................................................44
3.15memory-mappedregisters...............................................................................................45
3.16mcbspcontrolregistersandsubaddresses..........................................................................47
3.17dmasubbankaddressedregisters....................................................................................48
3.18interrupts....................................................................................................................50
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