ds21354/ds21554 3.3v/5v e1 单独的-碎片 transceivers
2 的 124
表格 的 内容
1.
INTRODUCTion.................................................................................................................. 6
1.1.
F
UNCTIONAL
D
ESCRIPTION
..............................................................................................................................7
1.2.
文档 修订 history .............................................................................................................8
2.
块 diag内存 .............................................................................................................. 9
3.
管脚 description............................................................................................................ 10
3.1.
管脚 函数 描述 ................................................................................................................14
3.1.1.
transmit-一侧 管脚..............................................................................................................................14
3.1.2.
receive-一侧 管脚...............................................................................................................................17
3.1.3.
并行的 控制 端口 管脚....................................................................................................................20
3.1.4.
jtag 测试 进入 端口 管脚...............................................................................................................22
3.1.5.
interleave 总线 运作 管脚 ............................................................................................................22
3.1.6.
线条 接口 管脚 ..............................................................................................................................23
3.1.7.
供应管脚 .........................................................................................................................................24
4.
并行的 端口............................................................................................................. 25
4.1.
寄存器 编排 ........................................................................................................................................25
5.
控制, id, 和 test 寄存器 .......................................................................... 30
5.1.
POWer-向上 sequence ..........................................................................................................................30
5.2.
同步 和 resynchronization...............................................................................32
5.3.
framer loopback ...............................................................................................................................36
5.4.
自动 alarm 一代........................................................................................................38
5.5.
偏远的 loopback ...............................................................................................................................40
5.6.
local lOOPBACK...................................................................................................................................40
6.
状态 和 information 寄存器 .................................................................... 43
6.1.
crc4 同步 计数器............................................................................................................................45
7.
错误 计数寄存器........................................................................................... 50
7.1.
bpv 或者 代号 violation 计数器 ...................................................................................................50
7.2.
crc4 错误 计数器.........................................................................................................................51
7.3.
e-位 计数器 .......................................................................................................................................51
7.4.
fas e
RROR
C
OUNTER
.................................................................................................................................52
8.
ds0 monitoring函数 ........................................................................................ 53
9.
signaling 运作................................................................................................. 56
9.1.
处理器-为基础 signaling ..........................................................................................................56
9.2.
硬件-为基础 signaling ............................................................................................................58
9.2.1.
Receive一侧 .......................................................................................................................................58
9.2.2.
transmit 一侧 ......................................................................................................................................59
10.
每-频道 代号 generation 和 loopback............................................... 60
10.1.
transmit-一侧 代号 一代 ................................................................................................60
10.1.1.
简单的 空闲 代号 insertion 和 每-频道Loopback.....................................................................60
10.1.2.
每-频道 代号嵌入 ...............................................................................................................61
10.2.
receive-一侧 代号 一代...................................................................................................62
11.
时钟 blocking寄存器..................................................................................... 63
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